Altium

Design Rule Verification Report

Date: 8/17/2025
Time: 4:41:21 PM
Elapsed Time: 00:00:01
Filename: C:\Users\daniel.sigg\Documents\Protel\Converter\Testing\FilterTestInterface\FilterTestInterface.PcbDoc
Warnings: 0
Rule Violations: 0

Summary

Warnings Count
Total 0

Rule Violations Count
Clearance Constraint (Gap=0.254mm) (InNetClass('Clearance8mils')),(InNetClass('Clearance8mils')) 0
Clearance Constraint (Gap=0.254mm) (HasFootprint('SOTFL50P160X60-6N')),(All) 0
Clearance Constraint (Gap=0.254mm) (All),(All) 0
Short-Circuit Constraint (Allowed=No) (All),(All) 0
Un-Routed Net Constraint ( (All) ) 0
Modified Polygon (Allow modified: No), (Allow shelved: No) 0
Width Constraint (Min=0.203mm) (Max=2.54mm) (Preferred=0.254mm) (All) 0
Routing Topology Rule(Topology=Shortest) (All) 0
Power Plane Connect Rule(Relief Connect )(Expansion=0.508mm) (Conductor Width=0.254mm) (Air Gap=0.254mm) (Entries=4) (All) 0
Minimum Annular Ring (Minimum=0.254mm) (All) 0
Hole Size Constraint (Min=0.203mm) (Max=5.08mm) (All) 0
Hole To Hole Clearance (Gap=0.254mm) (All),(All) 0
Minimum Solder Mask Sliver (Gap=0mm) (All),(All) 0
Silk To Solder Mask (Clearance=0.051mm) (IsPad),(All) 0
Silk to Silk (Clearance=0.254mm) (All),(All) 0
Net Antennae (Tolerance=0mm) (All) 0
Room BIT0 (Bounding Region = (152.4mm, 78.74mm, 161.925mm, 95.25mm) (InComponentClass('BIT0')) 0
Room BIT7 (Bounding Region = (223.52mm, 78.74mm, 233.045mm, 95.25mm) (InComponentClass('BIT7')) 0
Room BIT1 (Bounding Region = (162.56mm, 78.74mm, 172.085mm, 95.25mm) (InComponentClass('BIT1')) 0
Room Relay0 (Bounding Region = (228.6mm, 109.22mm, 269.875mm, 153.035mm) (InComponentClass('Relay0')) 0
Room Relay1 (Bounding Region = (185.42mm, 109.22mm, 226.695mm, 153.035mm) (InComponentClass('Relay1')) 0
Room Supply (Bounding Region = (27.94mm, 91.44mm, 60.96mm, 132.08mm) (InComponentClass('Supply')) 0
Room Byte0 (Bounding Region = (66.675mm, 71.12mm, 95.25mm, 90.805mm) (InComponentClass('Byte0')) 0
Room BIT6 (Bounding Region = (213.36mm, 78.74mm, 222.885mm, 95.25mm) (InComponentClass('BIT6')) 0
Room BIT5 (Bounding Region = (203.2mm, 78.74mm, 212.725mm, 95.25mm) (InComponentClass('BIT5')) 0
Room BIT2 (Bounding Region = (172.72mm, 78.74mm, 182.245mm, 95.25mm) (InComponentClass('BIT2')) 0
Room Relay2 (Bounding Region = (142.24mm, 109.22mm, 183.515mm, 153.035mm) (InComponentClass('Relay2')) 0
Room U_RelayMatrixCtrlIO (Bounding Region = (104.14mm, 17.78mm, 271.78mm, 60.96mm) (InComponentClass('U_RelayMatrixCtrlIO')) 0
Room BIT3 (Bounding Region = (182.88mm, 78.74mm, 192.405mm, 95.25mm) (InComponentClass('BIT3')) 0
Room BIT4 (Bounding Region = (193.04mm, 78.74mm, 202.565mm, 95.25mm) (InComponentClass('BIT4')) 0
Room Relay3 (Bounding Region = (99.06mm, 109.22mm, 140.335mm, 153.035mm) (InComponentClass('Relay3')) 0
Height Constraint (Min=0mm) (Max=25.4mm) (Prefered=12.7mm) (All) 0
Total 0